Layer Stack Management Enhancements (New Feature Summary) - Altium designer 17 layer stack manager free
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Altium designer 17 layer stack manager free.Calculating the Impedance
Altium designer 17 layer stack manager free.PCB Layer Stackup Technology and Terminology
Edit the other variable to change the Target Impedance , or alternatively change the Target Impedance to explore the impact on the other variable. The signal traces on a PCB are fabricated by etching away unwanted copper.
Because the etchant starts etching away the copper at the surface, this copper spends more time in contact with the etchant. The result is the finished edges of the trace will have a slope, reducing the cross-sectional area of the finished trace, as shown in the image below. Hover the cursor over the? This gives the following formula:.
The downside of this approach is that to specify no over-etching meaning the trace edges are vertical , you would have to enter a value of inf infinite for the etch factor. To simplify specifying the amount of etch, the formula has been inverted so a value of 0 zero can be entered to indicate there is no over-etching.
Another fabrication detail that contributes to the etch factor is the orientation of the copper. PCB traces are formed by etching away unwanted copper from a continuous sheet of copper laminated onto a dielectric substrate. The copper orientation defines the direction the copper projects away from that substrate. You can also think of it as the direction the copper is etched from, either above or below. The Copper Orientation can be edited in the Properties panel: in the Transmission line section Impedance tab active , or in the Layer section Stackup tab active.
It can also be edited in the Layer Stack Manager grid, if the Copper Orientation column is currently being displayed in the Grid. Copper layers also include an Orientation option. This field defines on which side of that copper layer the components are mounted on. The surface of each of the copper layers in a printed circuit board has a degree of roughness. During PCB fabrication the surface of copper layers are treated to increase the roughness, to improve the adhesion between the copper and dielectric layers.
Through extensive research and analysis, industry experts have concluded that the surface roughness can be modeled by a roughness correction coefficient, derived from Surface Roughness and Roughness Factor values. Roughness settings are available in the Layer Stack Manager mode of the Properties panel.
These parameters are used only for conductive layers. Surface roughness is included in the calculation of the characteristic impedance. The impedance calculator in the Layer Stack Manager supports single and differential coplanar structures. The impedance calculator determines the signal properties and clearances first image , use that clearance in the via shielding Distance setting. In a controlled impedance design, the selection of the materials used in the layer stackup is very important.
For example, the most common material used to fabricate PCBs is glass fiber fiberglass reinforced epoxy resin, with copper foil bonded onto each side. The tightness of the weave of the glass fiber fabric affects the value and consistency of the dielectric constant Dk permittivity and Loss Tangent Df. Surrounding the woven glass fabric is resin - the percentage of resin used is also important in the performance of the material. There is a large range of glass fiber weaves available.
To help ensure the predictability and performance of the glass fiber-based materials used in PCB fabrication, the IPC have a standard for weaves:. As the designer, you can either edit the material properties directly in the Layer Stack Manager , or select materials from the Altium Material Library. The materials are organized into usage categories, accessed through a tree structure on the left of the dialog.
Below this level, each usage category is broken into functional categories, such as: Conductive layer material , Dielectric layer material and Surface Layer Material ; in the PCB layer material category. New material can added to the library when a specific material category is selected in the tree.
Materials defined in an external material library can be loaded Load button , and user-defined material that has been added in the Altium Material Library dialog can also be saved to a user-library Save button. Only user-defined material is saved. Custom properties can be added to material detailed in the library default and user-defined material. To add a custom property, first select the correct node in the tree on the left to define the material s it is to be added to, then click the button to open the Material Library Settings dialog.
The required value can then be added to the selected material in the Altium Material Library dialog, select the row and click the Edit button. The dispersion over frequency can be described with a multi-pole Debye model - which requires multiple frequency points to build. Controlled impedance routing is all about configuring the routing width to deliver the correct impedance, which means the routing width may be different on each signal layer.
When this is done the software automatically sets the width to suit the layer. The required Impedance Profile is selected in the applicable Routing Width design rule for individual nets , or Differential Pairs Routing design rule.
This routing width rule targets a class of DRAM nets. The S50 Impedance Profile is defining the routing widths, which will change according to the layer being routed on. Using Altium Documentation. Load - use the drop-down to select the location from where to load a layer stack. Load from Vault - load layer stack data from a revision of a target Layerstack Item in a connected Altium Vault. The Load button menu will also present the available and shared Layerstack Items in the Altium Vault in which you are currently signed-in.
After choosing either a Stack-Up file or a Layerstack Item from a Vault, the Merge Layer Stacks dialog will open in which you can control how the layers in the existing stack and the layers in the stack being loaded are to be used. Stackup loading and preset loading is not possible if any of the layers are used on the board.
Content from the main table in the Layer Stack Manager can be easily copied and pasted into an external spreadsheet, such as Microsoft Excel.
Right-click in the table to utilize Copy With Header. Use this option to select the technology that will be used to build the board, the available options include: Custom , Layer Pairs , Internal Layer Pairs , and Build-Up. Note that this option does not affect the final design of the layer stackup; it is simply used to help select the appropriate type of dielectric layer to add and the location in the stack where it is added when you run the Add Layer command. In all modes other than Custom , whenever a signal layer is added, a dielectric layer will also be added.
The type and location of dielectric layer added depends on the current number of layers used and the current Layer Stackup Style setting. In Custom mode, new layers are added one by one.
This control is discussed further in the Advanced Mode section. Delete Layer - click to delete the selected layer.
There is no confirmation dialog for deleting a layer. Once you click Delete Layer , the selected layer will be deleted instantly.
Double-click on editable properties to enter text-editing mode or access drop-down menus. Note that not all properties are editable. In order for the Coverlay Expansion column to appear, the Custom Coverlays option must be enabled in the Board Region dialog for that region of the board.
Select an existing layer then click the Add Stack button to add a new layer stack. The properties of the new layer stack will be identical to the source stack. Note that flex bending is defined by placing a Bending Line across the flex region Press 1 to enter into rigid-flex defining mode and choose Design » Board Shape from menu then editing its properties in the PCB panel when the panel is set to Layer Stack Regions mode.
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